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Workshop on “Verilog- Hardware Description Language”

Mr.Muhammad Khurram     12-11-2017 18:34:39

Staff Development Unit of the Engineering Department organized a training workshop titled “Verilog, The Hardware Description Language” for the Computer, Electrical and Electronic section on 9th November 2017. Mr.J.Fakrudeen, Engineering Coordinator for SDU, welcomed the gathering of all the faculty members who attended the program. Mr. Muhammad Khurram, Lecturer/Engineering Department conducted the workshop.

In electronics, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits. A hardware description language enables a precise, formal description of an electronic circuit that allows for the automated analysis and simulation of an electronic circuit. It also allows for the synthesis of a HDL description into a netlist (a specification of physical electronic components and how they are connected together), which can then be placed and routed to produce the set of masks used to create an integrated circuit. A hardware description language looks much like a programming language such as C; it is a textual description consisting of expressions, statements and control structures. Verilog HDL is a hardware description language used to design and document electronic systems. HDLs form an integral part of electronic design automation (EDA) systems, especially for complex circuits, such as application-specific integrated circuits, microprocessors, and programmable logic devices.
This training is very useful for all the Computer, Electrical & Electronics faculty members.